Scheduling, Cores and Events · Lesson 26 of 30 · about 15 minutes
Partitioning Work Across Cores
Divide independent jobs and combine their results.
01 / Explain
Understand the idea
Multiple cores can execute different tasks independently. Independent work can be partitioned before it is run: one worker handles even-indexed jobs and another handles odd-indexed jobs. Results still need an agreed method of combination.
The systems lab uses separate VM instances for its core lanes. This challenge computes the same partition sequentially on one VM; its outputs verify the decomposition, not a claim of parallel hardware execution. Avoid shared writes when independent result locations are enough.
02 / Try
Watch it happen
The even-indexed worker processes addresses 0 and 2: 1² + 3² = 10. The systems view displays both worker lanes.
STORE 1 0
STORE 2 1
STORE 3 2
STORE 4 3
LOAD [0]
MUL R0
COPY R0 R1
LOAD [2]
MUL R0
ADD R1
PRINT
HALTUse Step to follow one instruction at a time. You can change the example and replay it.
03 / Challenge
Make it work
Four job values are seeded at memory 0–3. Worker even computes value[0]² + value[2]²; worker odd computes value[1]² + value[3]². Call both workers. Print the even total, odd total, and combined total in that order.
The checker runs your current editor program in a fresh machine for each of 3 test cases. It supplies inputs and seeded memory itself; the lab’s current output and memory do not decide your result.
CALL evenWorker
PRINT
CALL oddWorker
PRINT
LOAD R1
ADD R2
PRINT
HALT
evenWorker:
# Save even total in R1, return it in R0.
RETURN
oddWorker:
# Save odd total in R2, return it in R0.
RETURNNeed a hint?
Square each value in R0, keep the first square in the worker’s result register, then add the second square.
Reveal a worked solution
Read the program, predict each instruction’s effect, then step through it in the lab.
CALL evenWorker
PRINT
CALL oddWorker
PRINT
LOAD R1
ADD R2
PRINT
HALT
evenWorker: LOAD [0]
MUL R0
COPY R0 R1
LOAD [2]
MUL R0
ADD R1
COPY R0 R1
RETURN
oddWorker: LOAD [1]
MUL R0
COPY R0 R2
LOAD [3]
MUL R0
ADD R2
COPY R0 R2
RETURNEmoji CPU lab
Emoji program
Type LOAD, ADD, or another opcode then Space to insert emoji. Ctrl/⌘ + Enter runs or pauses; Escape pauses; Ctrl/⌘ + ] indents. Tab moves focus. Labels use a colon. Jumps use zero-based instruction addresses.
Instruction map and breakpoints (0)
Breakpoints stop before an instruction. Run resumes past the stopped breakpoint once; Step executes it directly. Editing source clears old breakpoints and machine state.
CPU registers
- R0
- 0
- R1
- 0
- R2
- 0
- R3
- 0
- R4
- 0
- R5
- 0
- R6
- 0
- R7
- 0
Stacks and loop frames
SP = 255 − data depth − call depth. The stack is separate from memory.
Data stack (bottom → top)
Empty
Call return addresses (bottom → top)
Empty
Loop frames
Empty
Output and input
Run a PRINT instruction to see output.
Queued input: Empty
Memory · 256 bytes · 0 nonzero
Each cell shows address:value. R = read this step; W = written this step. Select a cell to inspect or initialize it before execution. Use arrow keys to move, Home/End for the row, and Ctrl/⌘ + Home/End for the whole memory.
Execution trace · 0 entries
Recent entries below. Inspect any zero-based index to see complete detached before/after state.
Check your challenge
You can run this check any time. Every case must pass to record completion.
Progress uses localStorage only. It stays on this browser and is never sent to a server.